1. Field of the Invention
The present invention relates to an arithmetic processing apparatus and an arithmetic processing circuit, and more particularly to an arithmetic processing apparatus and an arithmetic processing circuit which can be applied to signal conversion such as correlation arithmetic, A/D (analog-digital) conversion, and D/A (digital-analog) conversion or to various arithmetic processes such as majority logic.
2. Related Background Art
A charge-scaling D/A converter, for example as described in ALLEN, HOLBERG, "CMOS ANALOG CIRCUIT DESIGN" P 534, is an example of the arithmetic processing apparatus for executing various processes as performing charge redistribution by one or more capacitors provided in an input portion thereof.
Further, Nao SHIBATA and Tadahiro OHMI, Tohoku University, reported another device called a neuro device, arranged with capacitances connected to the input thereof to execute various arithmetic operations by charge redistribution based on the capacitances and input voltages thereinto in "New-concept MOS transistor, realizing neuron function by a single unit" (NIKKEY MICRODEVICES, January 1992, p 101-).
These arithmetic processing apparatus, however, had the following problem. Since input capacitance due to parasitic capacitance and wiring capacitance, etc. existed in the input portion of comparator, dispersion appeared in gains of signals input into a comparator through the capacitors connected to the comparator, which caused output signals to have error components.
Particularly, when a plurality of devices with capacitances at input were used, gains of the respective devices differed from each other, which resulted in a problem of degrading arithmetic accuracy.